p-형 Si(100) 기판 위에 성장시킨 Bi_(3.25)La_(0.75)Ti_(3)O_(12) (BLT) 박막의 전기적특성
Electrical properties of Bi3.25La0.75Ti3O12 (BLT) thin film grown on p-type Si(100) substrate
p-형 Si(100) 기판 박막 BLT 전기적특성;
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Bi_(3.25)La_(0.75)Ti_(3)O_(12) (BLT) thin film have been grown on p-type Si(100) substrates by a sol-gel spin coating process. The structure and surface morphology of the film were analyzed by X-ray diffraction (XRD) and scanning electron microscopy (SEM). Furthermore, the electrical properties were examined by capacitance-voltage (C-V) characteristics by using a LF Impedance Analyzer(HP 4192A). XRD measurement show layered perovskite structure with a single phase in BLT thin film annealed at 700℃ for 30 min in oxygen. The measured grain size of BLT on Si is about 0.04 - 0.1 ㎛. From the cross-sectional SEM image, BLT film thickness is measured to be 0.4 ㎛. The C-V characteristic hysteresis curves show that the MFS(metal-ferroelectric-semiconductor) structure has memory effect. The memory window decreases, with increasing frequency at MFS structure. And it is found that the memory window increases as the applied voltage to the ferroelectric capacitor is increased. These phenomena may be due to polarization reversals of the BLT ferroelectric film and because of the charge injection from Si substrate into the ferroelectric thin film. The results obtained indicate that the present BLT films are suitable for making ferroelectric field effect transistor(FeFET) memory.