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Journal of semiconductor technology and science v.7 no.4, 2007년, pp.267 - 273   피인용횟수: 4
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A Delta-Sigma Fractional-N Frequency Synthesizer for Quad-Band Multi-Standard Mobile Broadcasting Tuners in 0.18-μm CMOS

Shin, Jae-Wook   (High-Speed Integrated Circuits and Systems Lab., Kwangwoon UniversityUU0000194  ); Kim, Jong-Sik   (High-Speed Integrated Circuits and Systems Lab., Kwangwoon UniversityUU0000194  ); Kim, Seung-Soo   (High-Speed Integrated Circuits and Systems Lab., Kwangwoon UniversityUU0000194  ); Shin, Hyun-Chol   (High-Speed Integrated Circuits and Systems Lab., Kwangwoon UniversityUU0000194  );
  • 초록

    A fractional-N frequency synthesizer supports quadruple bands and multiple standards for mobile broadcasting systems. A novel linearized coarse tuned VCO adopting a pseudo-exponential capacitor bank structure is proposed to cover the wide bandwidth of 65%. The proposed technique successfully reduces the variations of KVCO and per-code frequency step by 3.2 and 2.7 times, respectively. For the divider and prescaler circuits, TSPC (true single-phase clock) logic is extensively utilized for high speed operation, low power consumption, and small silicon area. Implemented in $0.18-{\mu}m$ CMOS, the PLL covers $154{\sim}303$ MHz (VHF-III), $462{\sim}911$ MHz (UHF), and $1441{\sim}1887$ MHz (L1, L2) with two VCO's while dissipating 23 mA from 1.8 V supply. The integrated phase noise is 0.598 and 0.812 degree for the integer-N and fractional-N modes, respectively, at 750 MHz output frequency. The in-band noise at 10 kHz offset is -96 dBc/Hz for the integer-N mode and degraded only by 3 dB for the fractional-N mode.


  • 주제어

    Delta-Sigma .   Fractional-N Frequency .   Synthesizer .   Quad-band .   mobile broadcasting tuners.  

  • 참고문헌 (8)

    1. B. Kim et al., 'A 100mW Dual-Band CMOS MobileTV Tuner IC for T-DMB/DAB and ISDB-T,' ISSCC Dig. Tech. Papers, pp.6l4-6l5, Feb. 2006 
    2. W. Rhee et al., 'A 1.1-GHz CMOS Fractional-N Frequency Synthesizer with 3-bit Third Order L-Li Modulator,' IEEE J. Solid-State Circuits, vol. 35, no. 10, pp. 1453-1460, Oct. 2000 
    3. I. Vassiliou et al., 'A 0.18um CMOS Dual-Band Direct-Conversion DVB-H Receiver,' ISSCC Dig. Tech. Papers, pp.606-607, Feb. 2006 
    4. P. Antoine et al., 'A Direct-Conversion Receiver for DVB-H,' IEEE J. Solid-State Circuits, vol. 40, no. 2, pp. 2536-2546, Dec. 2005 
    5. M. Womac et al., 'Dual-Band Single-Ended-Input Direct-Conversion DVB-H Receiver,' ISSCC Dig. Tech. Papers, pp.610-611, Feb. 2006 
    6. Y. Kim et al., 'A Multi-Band Multi-Mode CMOS Direct Conversion DVB-H Tuner,' ISSCC Dig. Tech. Papers, pp.608-609, Feb. 2006 
    7. M. Marutani et al., 'An 18mW 90 to 770 MHz Synthesizer with Agile Auto-Tuning for Digital TVTuners,' ISSCC Dig. Tech. Papers, pp.192-193, Feb. 2006 
    8. D. Hauspie et al., 'Wideband VCO with Simultaneous Switching of Frequency Band, Active Core and Varactor Size,' ESSCIRC Dig. Tech. Papers, pp.452-455, Sep. 2006 
  • 이 논문을 인용한 문헌 (4)

    1. 2008. "" Journal of semiconductor technology and science, 8(2): 143~149     
    2. Shin, Jae-Wook ; Shin, Hyun-Chol 2010. "A Wideband ${\Delta}{\Sigma}$ Frequency Synthesizer for T-DMB/DAB/FM Applications in $0.13{\mu}m$ CMOS" 電子工學會論文誌. Journal of the Institute of Electronics Engineers of Korea. SD, 반도체, 47(12): 75~82     
    3. 2014. "" Journal of semiconductor technology and science, 14(1): 109~116     
    4. 2016. "" Journal of semiconductor technology and science, 16(6): 873~879     

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