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Journal of electrical engineering & technology v.7 no.3, 2012년, pp.366 - 375   SCIE 피인용횟수: 1
본 등재정보는 저널의 등재정보를 참고하여 보여주는 베타서비스로 정확한 논문의 등재여부는 등재기관에 확인하시기 바랍니다.

Design and Temporal Analysis of Hardware-in-the-loop Simulation for Testing Motor Control Unit

Choi, Chin-Chul    (Graduate School of Control and Instrumentation Engineering, Changwon National University   ); Lee, Kang-Seok    (Graduate School of Control and Instrumentation Engineering, Changwon National University   ); Lee, Woo-Taik    (Dept. of Control and Instrumentation Engineering, Changwon National University  );
  • 초록

    This paper describes a design and temporal analysis of a hardware-in-the-loop (HIL) simulation environment for testing a motor control unit (MCU). The design concepts and main characteristics including unavoidable time delays of each component module are described. From temporal analysis results according to the module integration method, an appropriate solution is proposed to fix and minimize time delays. In order to verify the effectiveness of the proposed solution, the HIL test results are compared with the results of experiments and an offline simulation.


  • 주제어

    Hardware-in-the-loop (HIL) Simulation .   Motor .   Control .   Model .   Time delay.  

  • 참고문헌 (21)

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  • 이 논문을 인용한 문헌 (1)

    1. 2013. "" Journal of electrical engineering & technology, 8(5): 1227~1233     

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