본문 바로가기
HOME> 논문 > 논문 검색상세

논문 상세정보

IEEE transactions on electron devices v.64 no.2, 2017년, pp.432 - 437   SCI SCIE
본 등재정보는 저널의 등재정보를 참고하여 보여주는 베타서비스로 정확한 논문의 등재여부는 등재기관에 확인하시기 바랍니다.

Direct/Indirect Junction Between Channel Inversion Layer and Doped Source/Drain Region on Metal-Induced Lateral Crystallization Polycrystalline Silicon Bottom Gate TFTs

Seok, Ki Hwan (Department of Materials Science and Engineering, Research Institute of Advanced Materials, Seoul National University, Seoul, South Korea ) ; Lee, Sol Kyu (Department of Materials Science and Engineering, Research Institute of Advanced Materials, Seoul National University, Seoul, South Korea ) ; Kim, Hyung Yoon (Department of Materials Science and Engineering, Research Institute of Advanced Materials, Seoul National University, Seoul, South Korea ) ; Chae, Hee Jae (Department of Materials Science and Engineering, Research Institute of Advanced Materials, Seoul National University, Seoul, South Korea ) ; Lee, Yong Hee (Department of Materials Science and Engineering, Research Institute of Advanced Materials, Seoul National University, Seoul, South Korea ) ; Joo, Seung Ki ;
  • 초록  

    Top gate-structured thin-film transistors (TFTs) have a channel inversion region that is directly connected to the doped source/drain area. This stands in contrast with normal bottom gate-structured TFTs that have a channel inversion region on the downward facing side of the silicon layer regardless of the crystallinity. In this experiment, we fabricate a bottom gate TFT with a direct contact junction between the channel inversion layer and the doped source/drain area and subsequently analyze its electrical properties. The leakage current of direct junction structure is 7.4 times higher than indirect junction structure (indirect junction has 2.5 x 10(-13) A of leakage current and direct junction has 1.85 x 10(-12) A of leakage current). And we calculate the variation in the specific contact resistance according to differences in the intrinsic silicon thickness in order to confirm the effect that the intrinsic silicon thickness has on the bottom gate direct/indirect contact structure.


 활용도 분석

  • 상세보기

    amChart 영역
  • 원문보기

    amChart 영역

원문보기

무료다운로드
  • 원문이 없습니다.

유료 다운로드의 경우 해당 사이트의 정책에 따라 신규 회원가입, 로그인, 유료 구매 등이 필요할 수 있습니다. 해당 사이트에서 발생하는 귀하의 모든 정보활동은 NDSL의 서비스 정책과 무관합니다.

원문복사신청을 하시면, 일부 해외 인쇄학술지의 경우 외국학술지지원센터(FRIC)에서
무료 원문복사 서비스를 제공합니다.

NDSL에서는 해당 원문을 복사서비스하고 있습니다. 위의 원문복사신청 또는 장바구니 담기를 통하여 원문복사서비스 이용이 가능합니다.

이 논문과 함께 출판된 논문 + 더보기