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Applied surface science v.433, 2018년, pp.108 - 115   SCI SCIE
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Improved interface and electrical properties of atomic layer deposited Al2O3/4H-SiC

Suvanam, Sethu Saveda (School of Information and Communication Technology, KTH Royal Institute of Technology, Electrum 229, 164 40 Kista, Sweden ) ; Usman, Muhammed (School of Information and Communication Technology, KTH Royal Institute of Technology, Electrum 229, 164 40 Kista, Sweden ) ; Martin, David (School of Engineering, University of Warwick, Coventry, CV4 7 AL, United Kingdom ) ; Yazdi, Milad. G. (School of Information and Communication Technology, KTH Royal Institute of Technology, Electrum 229, 164 40 Kista, Sweden ) ; Linnarsson, Margareta (School of Information and Communication Technology, KTH Royal Institute of Technology, Electrum 229, 164 40 Kista, Sweden ) ; Tempez, Agnès (Horiba France SAS, CS 45002, 91120, Palaiseau, France ) ; Götelid, Mats (School of Information and Communication Technology, KTH Royal Institute of Technology, Electrum 229, 164 40 Kista, Sweden ) ; Hallén, Anders (School of Information and Communication Technology, KTH Royal Institute of Technology, Electrum 229, 164 40 Kista, Sweden ) ;
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    Abstract In this paper we demonstrate a process optimization of atomic layer deposited Al 2 O 3 on 4H-SiC resulting in an improved interface and electrical properties. For this purpose the samples have been treated with two pre deposition surface cleaning processes, namely CP1 and CP2. The former is a typical surface cleaning procedure used in SiC processing while the latter have an additional weak RCA 1 cleaning step. In addition to the cleaning and deposition, the effects of post dielectric annealing (PDA) at various temperatures in N 2 O ambient have been investigated. Analyses by scanning electron microscopy show the presence of structural defects on the Al 2 O 3 surface after annealing at 500 and 800°C. These defects disappear after annealing at 1100°C, possibly due to densification of the Al 2 O 3 film. Interface analyses have been performed using X-ray photoelectron spectroscopy (XPS) and time-of-flight medium energy ion scattering (ToF MEIS). Both these measurements show the formation of an interfacial SiO x (0 Highlights In this manuscript, we demonstrate a process optimization of atomic layer deposited Al 2 O 3 on 4H-SiC resulting in an improved interface and electrical properties. These findings clearly indicate that both the pre deposition surface cleaning treatment prior to the dielectric deposition, and the post deposition annealing plays important roles in determining the quality of interface between the 4H-SiC/Al 2 O 3 . The long standing dielectric reliability issues with Al 2 O 3 on 4H-SiC have also been addressed resulting in an improved interface and electrical properties in terms of lower oxide charges, flatband voltage, leakage current and higher breakdown voltage.


  • 주제어

    4H-SiC .   High-K dielectric .   Al2O3 .   Interface trap densities.  

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